Ahamad Mansoor wrote:
> First, I created my own Wishbone master, UFM controller, and integrated
> them with the EFB block. The UFM controller is essentially a state
> machine that reacts to inputs from the EFB block.
Did you check with a simulation that your Wishbone master works 
properly?

Rick D. wrote:

> Did you check with a simulation that your Wishbone master works
> properly?


Hi Rick,

Wishbone master works properly.

Really appreciated for the attachment. My IP express provides me with 
sectors A, likely UFM0, UFM1 and so on.

well, I had a concern whether my internal hardware is up or not. so, I 
came up with another move adding the softcore Mico8 and let the wishbone 
connection would do the job. looking towards it.

Do you have anything should I need concern when proceeding?


AM

Ahamad Mansoor wrote:
> Wishbone master works properly.
In simulation or in fabric?
And how did you know that it will work?

> My IP express provides me with
> sectors A, likely UFM0, UFM1 and so on.
My screenshot is from MacoXO2, so it might differ.

> Do you have anything should I need concern when proceeding?
On which addresses did you expect and access the UFM?
Did you have filled the UFM with a well known uniq pattern?

Ahamad Mansoor wrote:
> Hi everyone,

> I'm having trouble accessing the internal UFM in a Lattice MachXO
> device.

> Here’s what I’ve tried so far:
> That discussion highlights how layout, grounding, and reference stability can 
strongly affect precision DAC performance. Noise or improper filtering often 
creates unexpected behavior in high-resolution circuits. Components like 
AD5791ARUZ(https://www.ovaga.com/products/detail/ad5791aruz) are extremely 
sensitive to these factors, so careful PCB design and clean power regulation are 
essential for achieving accurate and repeatable output results.
> First, I created my own Wishbone master, UFM controller, and integrated
> them with the EFB block. The UFM controller is essentially a state
> machine that reacts to inputs from the EFB block. It sends a sequence of
> addresses followed by the required commands and operands.

> The communication flow looks like this:

> Other modules → UFM Controller → Wishbone Master → EFB Block

> However, I didn’t observe any activity on the UFM.

> So I tried a different approach using Mico8. I wrote a C program and
> first verified the setup using GPIO, which worked correctly and
> confirmed that the integration with the RTL modules was fine.

> Next, I added the EFB block configured for Wishbone and inserted test
> points in the C program to check whether the code was getting stuck
> anywhere. The program successfully passed all the test points, but there
> was still no response from the UFM.

> I also used the UFM library available in LMS.

> At this point, I’m starting to suspect that the internal UFM hardware
> might not be functioning or enabled properly.

> Has anyone encountered a similar issue or have suggestions on what I
> might be missing?

> Also, could someone share the correct configuration settings in the
> IPexpress GUI for enabling and accessing the UFM through the EFB block?

> cheers!

> AM

It sounds like the Wishbone side is alive, but the EFB/UFM bridge may 
not actually be enabled in IPexpress. Double check clock routing, UFM 
enable bits, and address mapping. I’d also verify BUSY/DONE status 
handling because incorrect sequencing can silently ignore UFM 
transactions.