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Forum: FPGA, VHDL & Verilog VHDL - Inertial Delay


von Thomas (Guest)


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Hello i have a more theoretic question. Can someone please explain to 
me, how drivers works on this example in the attched picture?

I understand that, all transactions that are older than the new 
transactions are deleted.

But for example where did the (1, 110ns) transaction go after first 
assignment and (2, 140ns) transaction after second assignment ?

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