Forum: FPGA, VHDL & Verilog VHDL - Inertial Delay

von Thomas (Guest)

Attached files:

Rate this post
0 useful
not useful
Hello i have a more theoretic question. Can someone please explain to 
me, how drivers works on this example in the attched picture?

I understand that, all transactions that are older than the new 
transactions are deleted.

But for example where did the (1, 110ns) transaction go after first 
assignment and (2, 140ns) transaction after second assignment ?


Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]

Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.