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Forum: FPGA, VHDL & Verilog Use example of Intel University program in Intel Quartus - problem with Board support package?


von Geldesch B. (Company: haa) (dravr)


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Hi,
I already posted my problem in the german section of 
mikrocontroller.net.
As it was a little bit unclear and a lot of content I want to reduce my 
concern:

I want to use a example from the Intel FPGA Monitor Program 18.1 and use 
it in Quartus 18.1. It is the video example, which creates a blue box on 
the HDMI output and writes a littel String with white letters on top of 
it.

I want to use it in Intel Quartus environment , do some test-outputs on 
my screen and finally add some more Hardware to the Avalon system. 
Unfortunately it doesnt work for me as i thought xD:

short file overview:

Project File: DE10_Nano_Computer.qpf

QSYS Konfiguration File: Computer_System.sopcinfo

SRAM File : DE10_Nano_Computer.sof

NIOSII Main: video.c

NIOSII library: address_map_nios2.h

Project includes:
https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&ved=2ahUKEwiHq8Ha0bHoAhXOsKQKHUu6DdIQFjAAegQIAxAB&url=ftp%3A%2F%2Fftp.intel.com%2FPub%2Ffpgaup%2Fpub%2FIntel_Material%2F18.1%2FComputer_Systems%2FDE10-Nano%2FDE10-Nano_Computer_NiosII.pdf&usg=AOvVaw1-HoCsnC7Vin21PNHOAsmE

I/O Peripheral | Qsys Core

    On-chip memory
    character buffer Character Buffer for Video Display
    SD Card SD Card Interface
    Red LED parallel port Parallel Port
    Expansion parallel ports Parallel Port
    Slider switch parallel port Parallel Port
    Pushbutton parallel port Parallel
    Port JTAG port JTAG UART
    Interval timer Interval timer
    System ID System ID
    Peripheral Audio port Audio
    Video port Pixel Buffer DMA Controller

Test1: Open FPGA Monitor Program 18.1 - create new project - select 
video example - sof is downloaded on FPGA - compile & load video.c 
Result: works HDMI shows test-string

Test2: download .sof to FPGA - Eclipse for Nios - new project simple 
hello world with bsp -work with .sof-put video.c and address_map_nios2.h 
into project- use video.c as main, Result: works HDMI shows test-string

Test 3: do the same as Test2 , Result: random pixels in the first ~20 
lines

Test 4: reinstall FPGA Monitor Program 18.1 do the same as Test2 Result: 
works HDMI shows test-string

Test 5: do the same like Test2, doesnt work, do the same like Test4 
Result: random pixels in the first ~20 lines

Test 6: copy .elf from my FPGA Monitor Program 18.1 software directory 
into project folder, run this this elf Result: works HDMI shows 
test-string

Test 7: change something of the video.c of Test 6, Result: works HDMI 
shows test-string but without the blue box !

Test 8: do the same like Test2 Result: random pixels in the first ~20 
lines

Test 9: Check run configurations : select all combinations of processor 
and byte stream devices Result: random pixels in the first ~20 lines

Test 10: Switch to FPGA Monitor Program 18.1, compile & Load video.c 
Result: works HDMI shows test-string

Check: Description in 
https://home.isr.uc.pt/~jfilipe/files/Final_Project_Simplified_Tutorial.pdf 
( they do nearly the same...)

Check: Book EMBEDDED SoPC DESIGN WITH NIOS II PROCESSOR AND VERILOG 
EXAMPLES : They say: BSP Editor will get the sopcinfo file and support 
you with your access to the Hardware. Without configuring much

Check: Intel BSP documents : hey say: BSP Editor will get the sopcinfo 
file and support you with your access to the Hardware. Without 
configuring much

Check: Intel The Nios® II Processor: Hardware Abstraction Layer in 
youtube: Youtube-Video "The Nios® II Processor: Hardware Abstraction Layer"

I suppose that something is wrong eather with my selected sopcinfo or 
with the BSP. Maybe you can give me some advice, tell me if you need 
more information ! :) Thank you :D

Here are some screenshots of my development environment:

https://de.scribd.com/document/452954331/Altera-Nios-II-BSP-Summary

https://de.scribd.com/document/452954367/Question-1

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