hi , I am doing VHDL based one project, where I want to call one program which is written in ahdl.i tried to use with port mapping method. Project is being compiled but unable to simulate. pl suggest the exact way how i can use my vhdl and ahdl(.tdf,inc) files together under same project. Thanks in advance
Rewrite the AHDL (assuming Altera-HDL) in VHDL, maybe there is a tool to assist you: https://www.google.de/search?ei=Altera-HDL+AHDL+converter