use of AHDL & VHDL under same project

pn Guest 2019-12-31 06:47 #6090446

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hi ,
I am doing VHDL based one project, where I want to call one program 
which is written in ahdl.i tried to use with port mapping method. 
Project is being compiled but unable to simulate.
pl suggest the exact way how i can use my vhdl and ahdl(.tdf,inc) files 
together under same project.
Thanks in advance

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DoingDingDong with HongDongsDonkey Guest 2019-12-31 07:02 #6090447

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Rewrite the AHDL (assuming Altera-HDL) in VHDL, maybe there is a tool to 
assist you:
https://www.google.de/search?ei=Altera-HDL+AHDL+converter

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