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I'm writing a module called "lessThan" in Verilog and it has an integer parameter called "keyBits". This module has two input ports, each (keyBits) bits long, and one output port, one bit long. I'd like to write a task called "cielLog" that gives me the lowest integer that is greater than or equal to the log (base two) of "keyBits". The easiest way to do that is to create two local integer variables "exponent" and "power", initialize them to zero and one respectively, and then start incrementing (exponent), maintaining the invariant that two to the (exponent) power always equals (power). How do you declare local variables in a Verilog task or function?
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Function void foo(void); Int bar = 4; Endfunction