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Forum: FPGA, VHDL & Verilog How can I add the status of lights “red-yellow” in Verilog


How can I add the status of lights “red-yellow” in Verilog
von Michał W. (michalwarmuz)

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I wrote a simple school project traffic light and I want to add a new 
state of "red-yellow" lights

!https://ibb.co/vDw4DTN This picture shows how it should look like

I do not know what the "if-else" statement looks like.

Thank you in advance for your help

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`timescale 1ns / 1ps

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module Traffic

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(

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  input       reset,

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  input       clk,

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  input       NS_VEHICLE_DETECT,

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  input       EW_VEHICLE_DETECT,

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  output wire NS_RED,

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  output wire NS_YELLOW,

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  output wire NS_GREEN,

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  output wire EW_RED,

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  output wire EW_YELLOW,

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  output wire EW_GREEN

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);

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reg [5:0] lights; //  {NS_RED, NS_YELLOW, NS_GREEN, EW_RED, EW_YELLOW, EW_GREEN}

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reg [4:0] nsCounter;

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reg [3:0] ewCounter;

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reg [1:0] yellowCounter;

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assign {NS_RED, NS_YELLOW, NS_GREEN, EW_RED, EW_YELLOW, EW_GREEN} = lights;

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always @(posedge clk)

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   if (reset)

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      lights <= 6'b001100;

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   else

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     if (nsCounter == 31 & EW_VEHICLE_DETECT & NS_GREEN)

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       lights <= 6'b010100;

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     else

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       if (ewCounter == 15 & EW_GREEN) 

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         lights <= 6'b100010;

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       else

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         if (yellowCounter == 3 & NS_YELLOW)

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           lights <= 6'b100001;

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         else

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           if (yellowCounter == 3 & EW_YELLOW) 

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             lights <= 6'b001100;

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//------------------------------------

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always @(negedge clk)

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  if (reset)

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    begin

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      nsCounter     <= 5'h0;

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      ewCounter     <= 4'h0;

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      yellowCounter <= 2'h0;

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    end

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  else

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    begin

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      nsCounter     <= nsCounter     + 1'b1;

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      ewCounter     <= ewCounter     + 1'b1; 

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      yellowCounter <= yellowCounter + 1'b1;

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    end

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//------------------------------------

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endmodule

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//====================================


  


  




  

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    Re: How can I add the status of lights “red-yellow” in Verilog
  


  

    

      von
      
        Lothar M.
            (Company: Titel)
        (lkmiller)
        (Moderator)
      
      


      
    


    

      
    

    

    

  
  


  

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Use a FSM with states for the possible light patterns. Cycle through 
those states and assign the according lights value afterwards.

BTW1:
one counter for the delay is eoungh when using a FSM for the states.

BTW2:
A question arises when seeing this:
input       NS_VEHICLE_DETECT,
input       EW_VEHICLE_DETECT,
What is the idle state of those traffic lights?
NS and EW red?
Or is the main street NS green and the lower traffic street EW red?
If the second (which would be more comfortable, but it would not force 
main street drivers to reduce speed..) then you also could ignore the NS 
vehicle detection.

  


  




  

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