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Forum: FPGA, VHDL & Verilog Project System Password


Author: Autielli Mako (Guest)
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Hi! I need to develop the project below, but I'm pretty much in doubt 
and I can not develop the code in VHDL. Can someone help me?

1) PROJECT SPECIFICATION:
Developed in VHDL the operation of a key-operated key with a description 
below:

Recognize the 4 digits of a password in the sequence in which they are 
entered, to allow the opening of the key; Limit the number of attempts 
to 3, after which the key will be locked and a siren will be triggered 
until the administrator password is entered; Allow a user to change 
their password; The password can be rescheduled infinitely. The table 
below illustrates the reprogramming the password.

Procedure for reprogramming the password:
a) Press and release PROG
b) Enter the current password, press ENTER and an LED should flash.
c) Enter the new password, press ENTER and the same LED should flash.
d) Enter the new password for the second time, press ENTER and the same 
LED again must blink.
e) To end the procedure, press and release PROG and the same LED will 
blink two times.

2) ACTIVITIES:
a) Implement in VHDL the design of the key driven by the keyboard;
b) The VHDL code must contain at least 6 subprograms (3 functions and 3 
procedures);
c) The VHDL code shall contain at least 1 component;
d) Simulate used Vector Waveform File at least.

Thank U!

Author: Helper (Guest)
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I need 1000€. Can someone help me?

Thank U!

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