how to do testbench

Guest #5761016
Rate this post
• ▲ useful
▼ not useful
module top_tb();

reg clk 50,reset,test;

reg [2:0] A;

wire [6:0] switch;
wire lcd_on,lcd_rs,lcd_rw,lcd_en,lcd_4,lcd_4,lcd_5,lcd_6,lcd_7;

wire clk;
wire [15:0] out1,out2, out3,out4, out5, out6, out7;
wire [15:0] in1, in2, in3, in4, in5,in6, in7;
wire [6:0] AmpOut;

dummyinput u1 (.clk50(clk50), .test(test), .in1(in1), .in2(in2), 
.in3(in3), .in4(in4), .in5(in5),.in6(in6), .in7(in7),.clk(clk));

sort u2 (.clk(clk),.in1(in1), .in2(in2), .in3(in3), .in4(in4), 
.in5(in5), .in6(in6), .in7(in7), .out1(out1), .out2(out2), .out3(out3), 
.out4(out4), .out5(out5), .out6(out6), .out7(out7));

ampout u3 (.clk(clk),.reset(reset), .out1(out1), .out2(out2), 
.out3(out3), .out4(out4), .out5(out5), .out6(out6), .out7(out7), .A(A), 
.AmpOut(AmpOut), .switch(switch));

lcd u4 (.clk50(clk50), .AmpOut(AmpOut), .lcd_on(lcd_on), 
.lcd_rs(lcd_rs), .lcd_rw(lcd_rw), .lcd_en(lcd_en), .lcd_4(lcd_4), 
.lcd_5(lcd_5), .lcd_6(lcd_6), .lcd_7(lcd_7));

endmodule

can someone do the testbench for this?

Reply

Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.

Formatting
  • [c]C-Code[/c]
  • [vhdl]VHDL-Code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]
  • [[Title]] – link to an article
  • Link to another post: right-click its post ID (#8078628), copy the address, paste it into the text

More about formatting

Post long source code as an attachment, not in the text.

Already registered? Log in

Not shown to anyone. We send you a link; your post appears once you confirm it there.

By submitting you create a free account and accept the terms of use.