Forum: FPGA, VHDL & Verilog Quartus II: How to disable most synthesis optimizations options

von Johannes (Guest)

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Hello together,

I'm trying to implement some butterfly-puf-cells on an Altera Cyclone II 
FPGA with Quartus II Version 13.0. But the program always removes my 
latches and connect the output pins to ground.

I have already implemented butterfly-puf-cells on a Xilinx Spartan3e 
FPGA with Xilinx ISE and using the same vhdl-files and it worked just 

You can find my Quartus-Project above. I'm really looking forward for 
your answers!

Thanks in advance


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