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Forum: FPGA, VHDL & Verilog VIVADO IP integration


von Elico C. (Company: WS) (elico)


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Hi all

Can I do an VHDL based IP and reuse it by integratig it in a schematic 
based design ( just getes withouut vhdl) and compile it all together and 
simulate it ?

Thanks

Elico

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