Hi folks!
I usually start my FPGA builds from Makefile.
The Xilinx toolchain (xst) gives a lot of information about the
synthezied design units:
1 | Analyzing hierarchy for entity <transmitter> in library <work> (architecture <behavioral>) with generics.
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2 | FREQ = 3780923
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3 | RATE = 115200
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1 | Synthesizing Unit <transmitter>.
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2 | Related source file is "x:.../transmitter.vhd".
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3 | Found finite state machine <FSM_1> for signal <state>.
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4 | -----------------------------------------------------------------------
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5 | | States | 3 |
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6 | | Transitions | 9 |
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7 | | Inputs | 6 |
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8 | | Outputs | 5 |
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9 | | Clock | clock (rising_edge) |
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10 | | Reset | reset (positive) |
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11 | | Reset type | asynchronous |
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12 | | Reset State | idle |
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13 | | Power Up State | idle |
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14 | | Encoding | automatic |
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15 | | Implementation | LUT |
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16 | -----------------------------------------------------------------------
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17 | Found 1-bit register for signal <busy>.
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18 | Found 4-bit up counter for signal <bits>.
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19 | Found 8-bit register for signal <byte>.
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20 | Found 1-bit register for signal <byteDone>.
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21 | Found 3-bit register for signal <bytes>.
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22 | Found 3-bit adder for signal <bytes$addsub0000> created at line 135.
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23 | Found 6-bit up counter for signal <counter>.
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24 | Found 32-bit register for signal <dataBuffer>.
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25 | Found 1-bit register for signal <disabled>.
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26 | Found 4-bit register for signal <disabledBuffer>.
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27 | Found 1-bit register for signal <paused>.
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28 | Found 10-bit register for signal <txBuffer>.
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29 | Found 1-bit register for signal <writeByte>.
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30 | Summary:
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31 | inferred 1 Finite State Machine(s).
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32 | inferred 2 Counter(s).
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33 | inferred 62 D-type flip-flop(s).
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34 | inferred 1 Adder/Subtractor(s).
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35 | Unit <transmitter> synthesized.
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From the Altera toolchain (Quartus) I only get a poor:
1 | Info (12021): Found 2 design units, including 1 entities, in source file .../T80/T80s.vhd
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2 | Info (12022): Found design unit 1: T80s-rtl
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3 | Info (12023): Found entity 1: T80s
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I look in "Quartus II Scripting Reference Manual - Altera" and "AN 309:
Command-Line Scripting in the Quartus II Software" but found no suitable
switch.
Does anybody know a way to get a more verbose output for the synthesis
results?