EmbDev.net

Forum: FPGA, VHDL & Verilog VHDL process sensitivity list - assistance


von Rejoy M. (Company: Lab Instructor) (rejoymathews32)


Rate this post
useful
not useful
When i use the following sensitivity list in a process - "process(all)" 
i get the below error.

"this construct is only supported in VHDL 1076-2008". Is there any other 
way I can implicitly define the sensitivity list with a reserved word 
other than 'all'.

Thank you.

von Lothar M. (Company: Titel) (lkmiller) (Moderator)


Rate this post
useful
not useful
No.
You must use VHDL 2008 to get that kind of laziness supported.

: Edited by Moderator
von Rejoy Roy Mathews (Guest)


Rate this post
useful
not useful
Thanks Lothar Miller for your prompt reply.

Please log in before posting. Registration is free and takes only a minute.
Existing account
Do you have a Google/GoogleMail account? No registration required!
Log in with Google account
No account? Register here.