FPGA Tasks to do

Jnine Guest 2017-08-14 15:55 #5110762

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Hi!

I have some tasks to do but I stuck. Can you help me please?

https://docs.google.com/document/d/1qZBdjqS52crgaWRyGlIjwzT1Op02yz7oi6CoqiOIkOw/pub

Kind regards

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aaa Guest 2017-08-14 16:08 #5110776

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for sure.

Whats your Problem?

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Jnine Guest 2017-08-14 16:17 #5110786

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Task 1 has two questions.

1. How would a DCM_SP block react if the BCLK loses its signal level?
I dont know the answer through too less experience. But I guess MCLK 
would lose its signal level as well?

2. Solution for an automatic clock recovery?
Maybe a second DCM?

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