Implementing Recast block in FPGA.

Guest #5021293 
Hello all!

 I'm trying code a lỉbrary equal HDL(verilog language). But I don't 
understand how can I do it. Please help me.

  Name and the use this block : "Recast: The Recast block provides value 
based on the requested data type cast at  the output, maintaining the 
same bits as provided at the input".

 Thanks.

 Japa
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Guest 
I see sth like:
"The Recast block provides value based on the requested data type cast 
at  the output, maintaining the same bits as provided at the input" in 
property of this block, I have to use it to implement in FPGA, with 
Xilinx, hope anyone help me to to solve this problem.
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