EmbDev.net

Forum: FPGA, VHDL & Verilog Implementing Recast block in FPGA.


Author: Japa (Guest)
Posted on:

Rate this post
0 useful
not useful
Hello all!

 I'm trying code a lỉbrary equal HDL(verilog language). But I don't 
understand how can I do it. Please help me.

  Name and the use this block : "Recast: The Recast block provides value 
based on the requested data type cast at  the output, maintaining the 
same bits as provided at the input".

 Thanks.

 Japa

Author: ManhVu (Guest)
Posted on:

Rate this post
0 useful
not useful
I see sth like:
"The Recast block provides value based on the requested data type cast 
at  the output, maintaining the same bits as provided at the input" in 
property of this block, I have to use it to implement in FPGA, with 
Xilinx, hope anyone help me to to solve this problem.

Reply

Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]




Bild automatisch verkleinern, falls nötig