I have written code for I2C communication between Spartan 3-E and the
ADV7171 encoder.The code simulation results attached here show the I2C
start, stop conditions and one random byte transfer between two
ACKS.From what I've read the slave device should send an ACK bit (pull
SDA low) on the 9th clock cycle.I am using a tristate buffer to control
the inout SDA pin and was wondering if there's any way to know whether
or not a successful ACK bit has been sent.
NOTE : The FPGA is only expected to operate in the master mode.
My approach :assign ACK = IO? (STARTCLK? SDA? 0 : 1 : 0) : 0;
The idea is to check if (IO==1(Buffer output = z) and SDA == 0).This
I have also attached the entire I2C code and would be extremely
grateful if someone could have a look.