Forum: FPGA, VHDL & Verilog Adding Buffer to input

von Uzair M. (Company: student) (uzair43)

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Hi all i have a NoC of 16 input and 16 output network and every in/out 
of network is 18 bits wide now i want to add a buffer to every input 
output so that it can break 18 bits into chunks of 1 bit, 2 bit or 4 
bit. Is there anyone who can tell me how i can add buffer to in/out 

von Lothar M. (lkmiller) (Moderator)

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What target? What HDL?  What toolchain?


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