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#4652531
Dear community, I am working on a project and I'm having troubles finding the best system to solve the problem. My task is to build a wired optical communication system with a bit rate of at least 100 MBit/s, better would be 1 GBit/s. As Modulation scheme PPM (Pulse Position Modulation) is used. For first tests receiver and transmitter can be on the same board and therefore share the same clock. Things I already have available are: Laser + 10Gbit/s LN Intensity Modulator 10Gbit/s Linear Optical Receiver What I need are: - an ADC which can sample the signal I get from the receiver with at least 2 Gsps, more would be better. Resolution of the ADC does not really matter. - an FPGA (or anything else) suitable for processing the data from the ADC (maybe something like the Xilinx Zynq would be nice because there is also an ARM core available for other tasks). Best would be if the ADC is on the same board as the FPGA or can be easily connected to it. - an FPGA (or anything else) to create the information signal for the modulator. I think the SERDES of an FPGA might be a good way to do this. If someone of you has experience doing something like this I would appreciate any help. Best regards, David