Forum: FPGA, VHDL & Verilog Max10 Application in CFM0 - Dualimage

von Eggi (Guest)

Rate this post
0 useful
not useful
Hi there,

I am wondering if it is possible to boot a NIOSII(f) processor out of 
the CFM0 region in a Max10 FPGA.

My scenario is: a QSYS System with dual-image (i am planning to use RSU) 
with on-chip ram and on-chip flash.

I want to use the "Golden Image" in CFM0 to remote upgrade the image in 
CFM1+CFM2 and for this i thought i could put the application which i 
create with the NIOS2 SBT tool into the CFM0 Region (probably in the 
higher address space).
Why i want to do that? The image requires not much space and when i look 
at the memory usage of my design and application the CFM0 space is 
enough and i wouldn't have to bother to secure the space where the 
application is stored.
Also i'd like to  write the design in one click into the FPGA.

I thought of several ways to accomplish that but i got none of them 

1st.: Use flash programmer and define the desired offset where the 
application should be stored. Nios2 throws Error 8 and when i look into 
the datasheet: 
The proble is: i can't use the EPCS Serial Flash Controller in QSYS with 
the Max10 FPGA.

2nd.: edit the .pof file. Not recommended from altera. Found the 
intel-format for .hex files and tried to edit the hex files from the 
application (NIOS2 -> Project -> build target -> mem_init_generate -> 
convert output to intel-format) but i wasn't able to make a file which 
the programmer likes. Probably haven't read enough about intel-format.

3rd.: Memory initialisation. I am not able to initialize on-chip ram 
with compressed dual-image mode but for on-chip flash it is working. So 
if i generate a file with the desired offset it should be possible? To 
write into UFM with mem_init i succeeded. Have to try to edit the .hex 

4th.: Find a way to override the desired memory space in QSYS or to 
redefine the CFM0 memory space.

I would appreciate it if someone can help me with this.

von Guest R. (global2016)

Rate this post
0 useful
not useful
Hi Eggi,

If you want to use dual configuration then it is not possible to 
initialize internal memory which otherwise can be used to initialize 
internal memory with a Nios II program during configuration.

A solution perhaps can be to execute a program directly from UFM. In 
this case you must include internal FLASH in your Qsys system. The Nios 
II cpu has to be setup accordingly with the correct reset and exception 

Alternatively you can configure the system that it will load the 
software from UFM into internal RAM during Nios II startup. Therefore 
you have to set the reset vector to the according UFM location an the 
exception vector into RAM. This will include an bootstrap loader which 
will be executed as first step during startup of The cup.

Within SBT the code region must be assigned to the appropriate memory 

For details go to YouTube where you can find according tutorial videos.

Best Regards


Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]

Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.