Forum: FPGA, VHDL & Verilog Altera Quartus Design Assistant Critical Warnings

von Robert (Guest)

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I get a number of Critical Warnings with respect to lpm_ff and 

Below are few:

Rule A102: Register output should not drive its own control signal 
directly or through combinational logic - Structure 1

Can these warnings be ignored? Moreover I am using Altera Quartus 11.1 
Web Edition. Could it be because of Open Core Plus?


von guest (Guest)

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My guess would be that your register output drives its own control 
directly or through combinational logic.

In my experience, Altera IP throws a lot of warnings, but never critical 
without reason.

Design rules for hardware design are not meant to make the code pretty, 
they are there to prevent ugly and unpredictable things from happening. 
So read the warnings and examine your system accordingly.


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