Vector with several components

Hello,
I am trying to realize a dot product in VHDL between two vectors : a and 
b.

A and b will both be composed of 8 values (a1, a2 ... a8) and each of 
those values will be a 8 bits integer.

How can i declare this on vhdl ? Is it possible to have only 2 entrees 
(a and b) or should i declare 2*8 entrees for all the vectors components 
?

Thanks a lot,
Jackoup