I have made a filter using Simulink and Xilinx SysGen tools. It works 
how it is intended, however I would now like to scale the system up from 
3x3 to NxN (aiming for at least N=9),to filter more data simultaneously.

So far I have created the 9x9 system, but it has many timing issues. 
Before I look into fixing these, I thought I'd look into parallelization 
as that will be faster (I presume). I have Kintex Seven board.

I'm quite the noob at FPGAs, and have not had much luck finding guides 
on parallelization that are related to SysGen and Xilinx. Could anybody 
please recommend guides related to these or just provide any other 
general advice.

Thankyou,
Liam