Forum: FPGA, VHDL & Verilog VHDL complex memory array code

von Omar Rashad (Guest)

Rate this post
0 useful
not useful

I am writing a simple code for a 2 dimensional complex number (integer) 
array in VHDL. The matrix is basically
[ 1 1 1 1 ,
  1 -1 j -j,
  1 -1 j -j,
  1 1 -1 -1,
  1 -1 -j j]

This is my code
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity IFFT_matrix is
  port (address_r, address_c: IN std_logic_vector (1 downto 0);
        wr, wi: OUT std_logic_vector (7 downto 0)); 
end IFFT_matrix;

architecture behavior of IFFT_matrix is

type matrix is array (0 to 3, 0 to 3) of integer range -1 to 1; --range depends on IFFT size
constant wr_matrix: matrix:= ((1,1,1,1),(1,-1,0,0),(1,1,-1,-1),(1,-1,0,0));
constant wi_matrix: matrix:= ((0,0,0,0),(0,0,1,-1),(0,0,0,0),(0,0,-1,1));


wr <= std_logic_vector(to_signed(wr_matrix (to_integer(unsigned(address_r), to_integer(unsigned(address_c)))));
wi <= std_logic_vector(to_signed(wi_matrix (to_integer(unsigned(address_r), to_integer(unsigned(address_c)))));

end behavior;

Compiling with vhdlan gives me this error:

"Parsing design file 'IFFT_matrix.vhd'

Error-[IEEEVHDLSYNTAXERR] Syntax error
IFFT_matrix.vhd, 18

  ...x (to_integer(unsigned(address_r), 
  Syntax error detected during VHDL parsing.

Error-[IEEEVHDLSYNTAXERR] Syntax error
IFFT_matrix.vhd, 19

  ...x (to_integer(unsigned(address_r), 
  Syntax error detected during VHDL parsing.

"IFFT_matrix.vhd": errors: 2; warnings: 0.
[oalsamma@bifur ~/intel]$ gedit IFFT_matrix.vhd"

I cannot quite figure out what to fix. Can you help please?

von FemtoMaik (Guest)

Rate this post
0 useful
not useful
check your brackets or use an editor which does this for you :-)

wr <=


Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]

Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.