VGA problem in Verilog

Guest #4106455
Rate this post
useful
not useful
In general, it's impossible to answer without your source code.
But the Basys2 is well known in e.g. classic fpga computing for
it's bad clock, more exactly, it's a jitty oscillator. This is
often the source of pixel jittering.
AFAIK the board has an 8-pin socket for an extra clock source.
Guest #4111278
Rate this post
useful
not useful
if there is a pll used, the clock should be fine. small clock problems 
usually lead only to bad pixels. if there is flickering, a bad 
constellation between hsynch and vsynch is given usually

most probably also a unsynched updating process of the screen will be 
the problem to solve

Reply

Please log in before posting.

or

Log in with Google account

Registration is free and takes only a minute.

Register now