EmbDev.net

Forum: FPGA, VHDL & Verilog audio recorder and playback in virtex 5


audio recorder and playback in virtex 5
Author: kelili (Guest)
Posted on:
Attached files:
Rate this post
0 ▲ useful
▼ not useful 
Hi everybody,

I want to have the RTL schematic of recorder modul, for this i used IP 
CORE GENERATOR of fifo and bram modul.
I have a probleme with fifo modul i didn't have the same ports like in 
the RTL  SCHEMATIC of recorder modul.
someone can help me?

Report post Edit Move Thread sperren Delete topic Thread mit anderem zusammenführen Quote selected text Reply Reply with quote
Re: audio recorder and playback in virtex 5
Author: Verilogi (Guest)
Posted on:
Rate this post
0 ▲ useful
▼ not useful 
where do the modules come from?

Report post Edit Delete Quote selected text Reply Reply with quote
Re: audio recorder and playback in virtex 5
Author: P. K. (pek)
Posted on:
Rate this post
0 ▲ useful
▼ not useful 
Maybe its just a difference in the abstraction levels. You should 
discuss that with the one who specified the task...

Report post Edit Delete Quote selected text Reply Reply with quote
Watch this topic | Disable multi-page view

Reply

Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]



Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.