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Forum: FPGA, VHDL & Verilog i need help in problem 2 please


von Kaily K. (Company: ndu) (kjj)


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can u help me in problem 2 plz

von mhm (Guest)


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Think of the vectors as of simple 7 bit binary vectors! Don't be 
confused because it contains 2's and 5's instead of 0's and 1's. So get 
a standard 7 bit vector like unsigned(6 downto 0), start with the value 
0 for this vector and just increment it until 127 (all 1's). For your 
desired output signal, you look at this counting vector: each 0 is being 
output as 2, each 1 is being output as 5. That's it.

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