Hello everyone! This is my first topic, I have not found anything like this so I'm posting. Well, I work with image processing for some time, but I am new to FPGA. I made an application in OpenCV of a Sobel operator and saved the information of the input image pixels and the output image in two different txts. Each txt line is a pixel in binary. Image resolution is 200x200, then the txts have 40,000 lines each. The question is, is I read a txt this by putting each line in a memory location using VHDL? Thanks to anyone who can help!
We had for short time the same question. Beitrag "RAM mit Filedaten intialisieren (VHDL)"
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Just look in the Xilinx User Guide at 'ROM HDL Technique". there you will find serveral examples so you can even copy the code.