Forum: FPGA, VHDL & Verilog Problem about DCM phase alignment

von ZHEN S. (Company: OSU) (xmuszq)

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according to datasheet, the CLKIN( labled '3') and CLKFB ( labled '6') 
are aligned, namely the phase of 3 and 6 should be the same, or we say 5 
and 3 should be the same as 5 and 6 are on the same wire.
then in my post-route simulation in ISIM, the clock is 375MHz, and it's 
in Xilinx Vertex 4 FPGA.  I use above mode, the phase  of 3 and 6 are 
the same, but 5 and 3 are quite different.  Also, the phase between 2 
and 3 are different. What's wrong with it? Is it a route delay?. in fact 
they are on the same line. if it's a route delay, is that possible that 

von Hassan Al Ashraui (Guest)

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You do not expect a Xilinx ISIM Simulation showing you the right 
relations in phases?  Did you proove that in reality?


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