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Forum: FPGA, VHDL & Verilog vhdl accessing std_logic_vector


von Barade B. (barade)


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Hi,
the following example won't be compiled with gvhdl:
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library ieee;
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use ieee.std_logic_1164.all;
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entity DemultiplexerEntity is
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  port(E: in std_logic;
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    SEL: in std_logic_vector(1 downto 0);
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    Y: out std_logic_vector(3 downto 0)
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  );
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end DemultiplexerEntity;
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architecture DemultiplexerArchitectureSelektiv of DemultiplexerEntity is
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  signal INDEX: integer;
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begin
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  with SEL select
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    INDEX <= 0 when "00",
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      1 when "01",
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      2 when "10",
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      3 when "11",
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      0 when others;
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  Y <= "0000"; -- clear
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-- DOESNT' WORK
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  --Y(INDEX) <= E;
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end DemultiplexerArchitectureSelektiv;
It says:
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c++: test.cc: In member function ‘virtual bool L4work_E19demultiplexerentity_A33demultiplexerarchitectureselektiv_P4_7pn::execute()’:
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c++: test.cc:337:144: error: ‘L4work_E19demultiplexerentity_A33demultiplexerarchitectureselektiv_S5index’ was not declared in this scope
How can I access the output logic vector properly?

von Lothar M. (lkmiller) (Moderator)


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1
   Y <= "0000"; -- clear
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-- DOESNT' WORK
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  --Y(INDEX) <= E;
What doesn't work?
Does it not work when you uncomment the second assignment?
So, when you try at "first" clearing the vector and "afterwards" setting 
1 output bit?

> How can I access the output logic vector properly?
What do you want to do at all?

von Barade B. (barade)


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The error below occurs when I uncomment the section.
I just want to make sure that all other output bits are 0. I want to 
determine the index of the output bit position and therefore write one 
single bit into the vector at position INDEX.

von Lothar M. (lkmiller) (Moderator)


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> The error below occurs when I uncomment the section.
> I just want to make sure that all other output bits are 0.
You cannot do this (assigning two values to one signal) with a 
concurrent statement! Use a process instead:
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  process (E, INDEX) begin
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    Y <= "0000";      -- default assignment
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    Y(INDEX) <= E;    -- "last" assignment "wins" 
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  end process;

> the following example won't be compiled with gvhdl
A simulator should be able to handle this conflict. It must result in 
"X" values, but all in all the concurrent style code is able to be 
compiled...

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