It has been a while since I programmed using VHDL, plus I don't have
much experience. I am trying to create a simple, structural, 8-bit ALU
model that is capable of doing two's complement arithmetic (addition and
subtraction) and that can do the logic functions NAND and NOR.
I started out creating an Add_Sub and Mux in the megawizard. After that,
I am pretty much lost. I believe it's something like having a top-level
entity that comprises the components and lays out the basic
If anyone can point me in the right direction, or what I'm missing, it
would be greatly appreciated.
Dude, don't be an idiot. And by the way, I'm sure if someone wanted to
know how to build a car, there would be someone intelligent enough to
tell a person how. If you're not, then just stay out of the
People learn by example, by mistakes, or by instructions. In this case,
I'm trying to learn by instruction. All I asked for was some help, so
next time use a little introspection before you cast arrogant remarks in
an open forum.
Dude, don´t be an idiot!
what you posted is only a small fragmet of what is needed for an alu.
And now you ask the people to help you to make an alu out of this.
I just wanted to show the really bad quality of your question. But
probably you didn´t undertood this.
If you ask a proper question you´ll get a proper answer!
I think you have no glue of what you´re doing here.
But you want to learn things by instruction. So why don´t you start with
something more easy. You don´t know what a top level is and you don´t
know how to connect certain componentes. So start with a small example.
E.g. two AND-Gates.
Words you can google are:
COMPONENT, PORT MAP, etc..
If you are familiar with this than you can try to make a project. And if
you stuck then, you are able to ask sensible questions.
Anyway, maybe you find a teacher here giving you a general VHDL-course.
btw. I wonder why you don´t use Verilog. Because if you write "tire" you
must be from cotton-picker-country, where Verilog is the HDL that
>>Why don't you simply say>>if(command) c=a+b ; else c=a-b;
maybe because Megawizard doesn´t have a click-and-ready solution for
this statement ;-)
A simple ALU may be "described" like this (you don´t "program" with
case COMMAND is
when "00" => C <= A + B;
when "01" => C <= A - B;
when "10" => C <= not (A and B);
when "11" => C <= not (A or B);
when others => NULL;
I hope this helps you.
> Ha John you must be in Eisenbarth's class too.
Looks like he is. Greeting to Texas from Germany... ;-)
Are you are allowed to use third party cores in your homework? Do you
have to do the (really senseless) job and just wire some components
together? Aren't you allowed to use behavioral description (like all the
others around the wordl)?
A mux is a fairly simple design, even in a structural description you
should be allowed to use this:
ENTITY MUX2X8 ISPORT (
data0x : INSTD_LOGIC_VECTOR (7DOWNTO0);
data1x : INSTD_LOGIC_VECTOR (7DOWNTO0);
sel : INSTD_LOGIC ;
result : OUTSTD_LOGIC_VECTOR (7DOWNTO0)
ARCHITECTURE SYN OF mux2x8 ISBEGIN
result <= data0x when sel='1'else data0x;
The "upper level wiring" then can be done structural (even if that makes
no further sense to me...).