EmbDev.net

Forum: FPGA, VHDL & Verilog 8bits to 7segments decoder


8bits to 7segments decoder
von werner (Guest)

Rate this post
• ▲ useful
▼ not useful 
Hi, im trying to make a 8bits to 3digits 7segments decoder usind a 
double dabble, but there is something wrong with my code and i dont know 
what, can you help me?



1
library ieee;

2
use ieee.std_logic_1164.all;

3
use ieee.std_logic_arith.all;

4
5
  package my_pkg is 

6
    function to_bcd (bin : std_logic_vector(7 downto 0)) return std_logic_vector;

7
  end package my_pkg;

8
9
  package body my_pkg is 

10
    function to_bcd (bin : std_logic_vector(7 downto 0)) return std_logic_vector is

11
variable i : integer:=0;

12
variable bcd : std_logic_vector(11 downto 0) := (others => '0');

13
variable bint : std_logic_vector(7 downto 0) := bin;

14
15
begin

16
for i in 0 to 7 loop  

17
bcd(11 downto 1) := bcd(10 downto 0); 

18
bcd(0) := bint(7);

19
bint(7 downto 1) := bint(6 downto 0);

20
bint(0) :='0';

21
22
23
if(i < 7 and bcd(3 downto 0) > "0100") then 

24
bcd(3 downto 0) := bcd(3 downto 0) + "0011";

25
end if;

26
27
if(i < 7 and bcd(7 downto 4) > "0100") then 

28
bcd(7 downto 4) := bcd(7 downto 4) + "0011";

29
end if;

30
31
if(i < 7 and bcd(11 downto 8) > "0100") then  

32
bcd(11 downto 8) := bcd(11 downto 8) + "0011";

33
end if;

34
35
36
end loop;

37
return bcd;

38
end to_bcd;

39
  end package body my_pkg;

40
41
42
43
entity termometro is

44
port (

45
  clk: in std_logic;

46
  data: in std_logic_vector(7 downto 0);

47
  Di: out std_logic_vector (6 downto 0);

48
  Vtc:out std_logic_vector(3 downto 0));

49
end termometro;

50
51
architecture behavior of termometro is

52
  signal bcd1, bcd2, bcd3: std_logic_vector(3 downto 0);

53
  type segs is(se0, se1, se2);

54
  signal seg_atual, prox_seg: segs;

55
  signal S1, S2, S3: std_logic_vector(6 downto 0);

56
  begin

57
    bcd1<=to_bcd(3 downto 0);

58
    bcd2<=to_bcd(7 downto 4);

59
    bcd3<=to_bcd(11 downto 7);

60
  

61
  process(bcd1, bcd2, bcd3)

62
  begin

63
64
  WITH bcd1 SELECT

65
  S1 <= "1111110" when "0000",

66
      "0110000" when "0001",

67
      "1101101" when "0010",

68
      "1111001" when "0011",

69
      "0110011" when "0100",

70
      "1011011" when "0101",

71
      "0100000" when "0110",

72
      "1110000" when "0111",

73
      "1111111" when "1000",

74
      "1111011" when "1001",

75
76
      "0000000" when others;

77
  WITH bcd2 SELECT

78
  S1 <= "1111110" when "0000",

79
      "0110000" when "0001",

80
      "1101101" when "0010",

81
      "1111001" when "0011",

82
      "0110011" when "0100",

83
      "1011011" when "0101",

84
      "0100000" when "0110",

85
      "1110000" when "0111",

86
      "1111111" when "1000",

87
      "1111011" when "1001",

88
89
      "0000000" when others;

90
  WITH bcd3 SELECT

91
  S1 <= "1111110" when "0000",

92
      "0110000" when "0001",

93
      "1101101" when "0010",

94
      "1111001" when "0011",

95
      "0110011" when "0100",

96
      "1011011" when "0101",

97
      "0100000" when "0110",

98
      "1110000" when "0111",

99
      "1111111" when "1000",

100
      "1111011" when "1001",

101
102
      "0000000" when others;

103
  

104
  end process;

105
  

106
  process(clk) is

107
  begin

108
    if(clk = '1' and clk'event) then

109
      seg_atual<=prox_seg;

110
    end if;

111
  end process;

112
  

113
  process (S1, S2, S3) is

114
    begin  

115
        case seg_atual is

116
          when se0=>

117
            Di <= S1;

118
            Vtc<= "0001";

119
            prox_seg <= se1;

120
          when se1 =>

121
            Di <= S2;

122
            Vtc<= "0010";

123
            prox_seg <= se2;

124
          when se2 =>

125
            Di <= S3";

126
            Vtc<= "0100";

127
            prox_seg <= se3;

128
        end case;

129
      end process;

130
  

131
end behavior;


  


  




  

    Report post Edit Move Thread sperren Anmeldepflicht aktivieren Anpinnen Delete topic Thread mit anderem zusammenführen Quote selected text Reply Reply with quote
  







      

      



  

    Re: 8bits to 7segments decoder
  


  

    

      von
      
        Lothar M.
            (Company: Titel)
        (lkmiller)
        (Moderator)
      
      


      
    


    

      
    

    

    

  
  


  

  Rate this post
  

  •
  
  ▲ useful 
  

  ▼ not useful 
  		
  

  


  

      
> but there is something wrong with my code and i dont know what
Do you have a test bench for the code?

> but there is something wrong with my code and i dont know what
Really your code?
1
    function to_bcd (bin : std_logic_vector(7 downto 0)) return  std_logic_vector;

2
    

3
    :

4
    :

5
6
    bcd1<=to_bcd(3 downto 0);   -- 4 bits input for a 8 bit function?

7
    bcd2<=to_bcd(7 downto 4);f

8
    bcd3<=to_bcd(11 downto 7);

This looks for me like more like:
"I have copied some pieces of code from somewhere, do not understand 
even one line, and its not working like i expected! Whats wrong?"

So, first try to understand what to_bcd does and how you have to use it.
A hint: you only have to call this function once.



You can do this here much more compact, if you convert only one digit 
(the one to be displayed) and multiplex the bcd input instead of the 
segment /output/:
1
  process(bcd1, bcd2, bcd3)

2
  begin

3
4
  WITH bcd1 SELECT

5
  S1 <= "1111110" when "0000",

6
      :

7
      "0000000" when others;

8
9
  WITH bcd2 SELECT

10
  S1 <= "1111110" when "0000",

11
      :

12
      "0000000" when others;

13
14
  WITH bcd3 SELECT

15
  S1 <= "1111110" when "0000",

16
      :

17
      "0000000" when others;

18
19
  end process;


  


  




  

    Report post Edit Delete Quote selected text Reply Reply with quote
  







      

      



  

    Re: 8bits to 7segments decoder
  


  

    

      von
      
        werner (Guest)
      
      


      
    


    

      
    

    

    

  
  


  

  Rate this post
  

  •
  
  ▲ useful 
  

  ▼ not useful 
  		
  

  


  

      
i've made this code by using one that i've found on the internet, i used 
a double dabble(and i understud it) code with a sweep code for 7segments 
that i've(not from internet) made sometime ago that showed the word 
'DATE' and 'HORA' for example on a 4digit 7segment display, it showed 1 
letter each clock time on a diferent digit, so i use a realy fast clock 
and it looks like that it was appearing simultaneously, i just try to 
join the 2 codes, i didnt found it anywhere

BUTT i doesnt work, no matter what i try, and i tryed alot, and i dont 
know what is wrong with it, thats why im asking on this forum


but thx for the tip, ill try it

  


  




  

    Report post Edit Delete Quote selected text Reply Reply with quote
  







      

      



  

    Re: 8bits to 7segments decoder
  


  

    

      von
      
        TheMason (Guest)
      
      


      
    


    

      
    

    

    

  
  


  

  Rate this post
  

  •
  
  ▲ useful 
  

  ▼ not useful 
  		
  

  


  

      
One thing i have noticed :

you used copy&paste to decode 4 bits to a 7-segment digit, but you 
forgot to change the destination register.

your bcd1 bcd2 and bcd3 all (!) work on only S1. I think bcd1 should be 
decocded in S1, bcd2 in S2 and bcd3 in S3, i seems to make more sense, 
than using only S1. And anyway, later on you use S2 and S3 without 
having made an assignment. perhaps this is the reason why it won't work.

  


  




  

    Report post Edit Delete Quote selected text Reply Reply with quote
  








    

    

       Watch this topic

      |
         Disable multi-page view

    

        


Please log in before posting. Registration is free and takes only a minute.



  Existing account

  


  
  

  
    

      

        
          
        
        
          
        
      

      

        
          
        
        
          
        
      

    


    
    
    





  Do you have a Google/GoogleMail account? No registration required!

  Log in with Google account
  





  No account? Register here.