[begginer issue] Read and Write to txt files

OP (Company: iiu) #2925807
Rate this post
• ▲ useful
▼ not useful
Hello everyone I am new to vhdl so am having trouble to do simple things 
such as reading and writing from txt files.My problem with the following 
code is that all I am taking is an empty txt file.Is there any way to 
check my variables if they are empty or not?

I ve also uploaded the input file
1
--include this library for file handling in VHDL.
2
library std;
3
use std.textio.all;  --include package textio.vhd
4

5
--entity declaration
6
entity filehandle is
7
end filehandle;
8

9
--architecture definition
10
architecture Behavioral of filehandle is
11
--period of clock,bit for indicating end of file.
12
signal clock,endoffile : bit := '0';
13
--data read from the file.
14
signal    dataread : real;
15
--data to be saved into the output file.
16
signal    datatosave : real;
17
--line number of the file read or written.
18
signal    linenumber : integer:=1; 
19

20
begin
21

22

23
clock <= not (clock) after 1 ns;    --clock with time period 2 ns
24

25

26
--read process
27
reading :
28
process
29
    file   infile    : text is in  "C:\Users\Deton@tor\Documents\02217 Design of Arithmetic Processors\aes\1.txt";   --declare input file
30
    variable  inline    : line; --line number declaration
31
    variable  dataread1    : real;
32

33
begin
34
wait until clock = '1' and clock'event;
35
if (not endfile(infile)) then   --checking the "END OF FILE" is not reached.
36
readline(infile, inline);       --reading a line from the file.
37
  --reading the data from the line and putting it in a real type variable.
38
read(inline, dataread1);
39

40
dataread <=dataread1;   --put the value available in variable in a signal.
41
else
42
endoffile <='1';         --set signal to tell end of file read file is reached.
43
end if;
44

45
end process reading;
46

47
--write process
48
writing :
49
process
50
    file      outfile  : text is out "C:\Users\Deton@tor\Documents\02217 Design of Arithmetic Processors\aes\2.txt";  --declare output file
51
    variable  outline  : line;   --line number declaration  
52
  
53
  begin
54
  
55
wait until clock = '0' and clock'event;
56
if(endoffile='0') then   --if the file end is not reached.
57
--write(linenumber,value(real type),justified(side),field(width),digits(natural));
58
write(outline, dataread, right, 16, 12);
59
-- write line to external file.
60
writeline(outfile, outline);
61
linenumber <= linenumber + 1;
62
else
63
null;
64
end if;
65

66
end process writing;
67

68
end Behavioral;
Attached files:

Reply

Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.

Formatting
  • [c]C-Code[/c]
  • [vhdl]VHDL-Code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]
  • [[Title]] – link to an article
  • Link to another post: right-click its post ID (#8078628), copy the address, paste it into the text

More about formatting

Post long source code as an attachment, not in the text.

Already registered? Log in

Not shown to anyone. We send you a link; your post appears once you confirm it there.

By submitting you create a free account and accept the terms of use.