Hello everyone, I am a newbie in VHDL, Im programming a code for
simulating a T flip flop but all I get are errors.. Right now my code is
not supossed to do nothing but giving the value '1' to q_temp but Im
getting this error in line 47 and I dont know why, can anyone help me
please?
Line 47. Variable 'q_temp' q_temp is at left hand side of signal
assignment statement.
1 | entity TFF2 is
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2 | Port ( T : in STD_LOGIC;
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3 | CLK : in STD_LOGIC;
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4 | Q : out STD_LOGIC;
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5 | notQ : out STD_LOGIC);
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6 | end TFF2;
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7 |
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8 | architecture Behavioral of TFF2 is
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9 |
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10 | begin
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11 |
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12 |
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13 |
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14 | Tff: process (CLK, T) is
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15 | variable q_temp: std_logic :='0';
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16 | begin
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17 | if (clk'event and CLK = '1' and T = '1') then
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18 | q_temp <= '1'; --LINE 47
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19 | end if;
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20 | end process;
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21 |
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22 | --q_next<='1';
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23 | --q_past <= '1';
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24 | -- Q <= q_temp;
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25 | --Q <= '1';
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26 |
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27 | end Behavioral;
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