How can I print line numbers and file names in a VHDL testbench?

Martin S. OP #2814587
Rate this post
• ▲ useful
▼ not useful 
Hello,

I'm working on a VHDL testbench where I use assert statements to check 
if the returned result is as expected. If a tests fails I would like to 
know in which line the test failed.

I'm using ISIM from Xilinx which doesn't print any line numbers for 
report statements.

Does anyone know if there exists a predefined function which returns the 
current line number?


Best regards
Martin
Reply Quote Edit Move Thread sperren Anmeldepflicht aktivieren Anpinnen Delete topic Thread mit anderem zusammenführen Report post
Watch this topic

Reply

Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.

Formatting
  • [c]C-Code[/c]
  • [vhdl]VHDL-Code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]
  • [[Title]] – link to an article
  • Link to another post: right-click its post ID (#8078628), copy the address, paste it into the text

More about formatting

Post long source code as an attachment, not in the text.

Your name and e-mail address

Already registered? Log in

Not shown to anyone. We send you a link; your post appears once you confirm it there.

By submitting you create a free account and accept the terms of use.