I have a problem with interrupts on the lpc2388. The processor enters the interrupt mode and then hangs. I have tried fiq and irq modes, with the same results. As a diagnostic, I placed a U0THR='I'; as the first instruction in both my interrupt routine and in the stubs, which I have tried enabled, and commented out. The instruction is never executed. My initialization code is as follows: VICVectAddr=0; // VICIntSelect = 1<<28; // uart2 int is fiq VICSoftIntClr = 0xffffffff; VICVectAddr28 = (unsigned)(void*)uart2_isr; VICVectCntl28 = 1; VICIntEnable = 1<<28; I am using gcc - latest yagarto build. Any assistance would be much appreciated. Thanks Kevin Twiggs
Hi Kevin,
have you enabled the global IRQ or FIQ in the CPSR core register of the
LPC? Without that, the core will never recognize any action from the
off-core VIC hardware. Try this to to so:
void enable_irq (void)
{
_asm__ __volatile_ ("MRS r1, CPSR");
_asm__ __volatile_ ("BIC r1, r1, #0x80");
_asm__ __volatile_ ("MSR CPSR_c, r1");
}
void AVIC_enable_fiq (void)
{
_asm__ __volatile_ ("MRS r1, CPSR");
_asm__ __volatile_ ("BIC r1, r1, #0x40");
_asm__ __volatile_ ("MSR CPSR_c, r1");
}
Best Microman
Hi Yes I have, the problem is that the interrupt happens, and I dont know what it is calling, because it never reaches my diagnostics. There are stubs in the startup code for IRQ,FIQ etc, do I need to link to them, ot how does GCC put its vector in place? I had a similar scheme working on a lpc2103, the difference was that the 2103 has a default irq vector register, and I think this the problem that I have with the 2388, there is a link missing. Thanks Kevin Twiggs
Please create a minimal example to reproduce the issue (source-code incl. startup, linker-script, makefile or at least all compiler, assembler and linker options. Note the difference between VIC190 as in LPC2103 and VIC192 as in LPC23xx. IRC there is an application-note on porting between "old" and "new" LPC2xxx available on nxp.com.
Hi I have attached a zip file with all the source code in it. Thanks Kevin Twiggs
Just a quick remark since I currently do not have enough time to take a
closer look into the code.
If the ISR is emplemented with the ISR_ENTRY/ISR_EXIT-Macros the naked
attribut has to be used so at least change
//void uart2_isr (void) _attribute_ ((naked));
void uart2_isr (void) _attribute_ ((interrupt("IRQ")));
to
void uart2_isr (void) _attribute_ ((naked));
//void uart2_isr (void) _attribute_ ((interrupt("IRQ")));
Background: when using attribut IRQ and Macros the return-address from
the ISR will be "adjusted" twice which is wrong (see
disassembly/lss-file: first "adjust" caused by macro:
19c: e24ee004 sub lr, lr, #4
second "adjust" inserted by compiler b/o attribute IRQ
1f0: e25ef004 subs pc, lr, #4
Maybe this rather old example code helps a little bit:
http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/#lpc23xx_demo1
You may also take a look into ChaN's (elm-chan.org) FatFs-examples.
There is one example for LPC23xx with interrupt-driven UART which uses a
very different approach (Assembler-Wrapper for IRQs, no macros, no
attributes, ISRs are implemented as "plain" C-functions which are called
by the ASM-wrapper which is called by the core on IRQ-exceptions).
Watch this topic
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