EmbDev.net

Forum: FPGA, VHDL & Verilog Fixed point operations


Fixed point operations
von dhootha a. (Company: Student) (gollum)

Rate this post
0 ▲ useful
▼ not useful 
I have to deal with real type numbers in my code(synthesisable) so I am 
using     fixed point packages. I have a few doubts in this.
1.I want to define all variables in my function as ufixed(7 downto -6). 
I believe that all the values i get here dont need more than these 
number of bits.  When i am supposed to find  a+b or a/b or a*b , I would 
type it as resize(a/b , a'high, a'low). Would I get any problems with 
this format of representation ??
2. How do i find square root and exponent function of a fixed point 
number here? I can't use ** in fixed operations as per fixed point 
package rules.

Report post Edit Move Thread sperren Anmeldepflicht aktivieren Delete topic Thread mit anderem zusammenführen Quote selected text Reply Reply with quote
Re: Fixed point operations
von Andreas (Guest)

Rate this post
0 ▲ useful
▼ not useful 
1. That should work, the result will be rounded/truncated. See 
http://www.vhdl.org/fphdl/Fixed_ug.pdf.
2. Implement it yourself, or find a core that does it. It's an operation 
that is too expensive/application-dependent that it would make sense to 
define it as a VHDL operator.

Report post Edit Delete Quote selected text Reply Reply with quote
Re: Fixed point operations
von dhootha a. (Company: Student) (gollum)

Rate this post
0 ▲ useful
▼ not useful 
Okay.Thanks for replying :)

Report post Edit Delete Quote selected text Reply Reply with quote
Re: Fixed point operations
von dhootha a. (Company: Student) (gollum)

Rate this post
0 ▲ useful
▼ not useful 
How do i find b^a when i want to write as a synthesisable code??? Please 
give me an Idea.

Report post Edit Delete Quote selected text Reply Reply with quote
Watch this topic | Disable multi-page view

Reply

Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]



Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.