Forum: FPGA, VHDL & Verilog Round Robin Arbiter

von nick k. (Company: university) (tonionio)

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Hello there guys!

Could someone please give me an explanation for the following code I 
have found of a Round robin Arbiter?

http://www.asic-world.com/examples/vhdl/arbiter.html This is the code!

I cannot understand what is the use of the internal registers and what 
do their names mean!In addition I cannot quite understand the structure 
of the architecture with the "not" and in addition with the masks later 

Please give me an explanation.

With regards



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