Hi, I'm running into a problem that probably has a (really) easy fix but
I can't seem to find it:
1 | module MemAndALU(input wire [2:0]f, input wire [31:0]A,B, output [31:0]Y, output Z,N);
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2 |
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3 | wire Cout;
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4 | wire [31:0]sum;
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5 |
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6 | if(f==3'b000) begin
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7 | ripple_carry_adder RCA(Cout, sum, A, B, 1'b0);
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8 | assign Y=sum;
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9 |
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10 | if(sum==32'b0)
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11 | assign Z=1;
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12 | else
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13 | assign Z=0;
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14 |
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15 | if(sum[31]==1)
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16 | assign N=1;
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17 | else
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18 | assign N=0;
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19 | end
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20 | endmodule
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One of the errors I'm getting is
Error (10149): Verilog HDL Declaration error at MemAndALU.v(7):
identifier "sum" is already declared in the present scope
and
Error (10759): Verilog HDL error at MemAndALU.v(7): object A declared in
a list of port declarations cannot be redeclared within the module body
I can't use registers for this assignment (which is frustrating) The
header for ripple_carry_adder is here
module ripple_carry_adder
(
output Cout,
output [31:0]Sum,
input [31:0]A,
input [31:0]B,
input Cin
);
and I know that it works