Your pmu.s is in ARM assembler format but not in GNU assembler for ARM 
format. You should rewrite it

I have no GNU ARM toolchain installed, but for AVR it would look like:

pmu.S

#if 0
 PRESERVE8
  AREA  v6_pmu, CODE,READONLY
  ARM
  EXPORT enable_pmu
enable_pmu  PROC
  MRC     p15, 0, r0, c15, c12, 0
  ORR     r0, r0, #0x01
  MCR     p15, 0, r0, c15, c12, 0
  BX      lr
  ENDP
 END
#else
.global  enable_pmu
  .type  enable_pmu, @function
enable_pmu:
  ret
#endif

File extension is .S (uppercase) in order to indicate that tis is a 
assembler source file and not an intermediate assembler file from the 
toolchain (.s in lowercase).

Sorry the last answer is related to "Forum: ARM programming with GCC/GNU 
tools". For Codesourcery i don't know the assembler syntax.

Now i understand what you try to do.

You try to worl with your toolchain, what is called with KEIL ARM 
toolchain "Compiler support for accessing registers using named register 
variables"
http://www.keil.com/support/man/docs/armcc/armcc_CHDHCIEE.htm

In detail you try something like example 6, but for understanding i 
include example 5 too:

[citation]
You can also use named register variables to access registers within a 
coprocessor. The string syntax within the declaration corresponds to how 
you intend to use the variable. For example, to declare a variable that 
you intend to use with the MCR instruction, look up the instruction 
syntax for this instruction and use this syntax when you declare your 
variable. See Example 5.

Example 5. Setting bits in a coprocessor register using a named register 
variable

register unsigned int PMCR __asm(”cp15:0:c9:c12:0”);

__inline void __reset_cycle_counter(void)
{
    PMCR = 4;
}

Disassembly:

__reset_cycle_counter PROC
    MOV    r0,#4
    MCR    p15,#0x0,r0,c9,c12,#0      ; move from r0 to c9
    BX     lr
    ENDP

In Example 5, PMCR is declared as a register variable of type unsigned 
int, that is associated with the cp15 coprocessor, with CRn = c9, CRm = 
c12, opcode1 = 0, and opcode2 = 0 in an MCR or MRC instruction. The MCR 
encoding in the disassembly corresponds with the register variable 
declaration.

The physical coprocessor register is specified with a combination of the 
two register numbers, CRn and CRm, and two opcode numbers. This maps to 
a single physical register.

The same principle applies if you want to manipulate individual bits in 
a register, but you write normal variable arithmetic in C, and the 
compiler does a read-modify-write of the coprocessor register. See 
Example 6.

Example 6. Manipulating bits in a coprocessor register using a named 
register variable

register unsigned int SCTLR __asm(”cp15:0:c1:c0:0”);

/* Set bit 11 of the system control register */
void enable_branch_prediction(void)
{
    SCTLR |= (1 << 11);
}

Disassembly:

__enable_branch_prediction PROC
    MRC    p15,#0x0,r0,c1,c0,#0
    ORR    r0,r0,#0x800
    MCR    p15,#0x0,r0,c1,c0,#0
    BX     lr
    ENDP
[/citation]

Unfortuantely i can not check your link in detail.

[citation]
Basic example code used to be available as a download from the ARM 
website.  An improved version is now shipped as part of DS-5 (from 
version 5.8 onwards).  Within the DS-5 Bare-metal example package, the 
code is included as part of the "optimization3" example.
[/citation]

I don't find "Basic example code" and DS-5 website is currenty down.

Questions:

1/ Is enable_pmu allowed on OK6410 with Linux OS? The code from your 
first post would work on your board when translated with KEIL?

2/ Is r0 a register you can use in GNU toolchain freely? The code before 
and after the call to enable_pmu doesn't depend on r0?

4/ Did you check whether GNU toolchain allows "named registers" too, so 
you can write enable_pmu in C only instead in 
KEIL-Disassembly-transferred-in-GNU-Assembly-linked-with-GNU-C?

Add:

GNU GCC doc may help esp.
http://gcc.gnu.org/onlinedocs/gcc/Explicit-Reg-Vars.html#Explicit-Reg-Vars

>...
>AREA  v6_pmu, CODE,READONLY
>...

See AREA in the Realview Assembler documentation in ARM's infocenter and 
the about the SECTION-instruction in the GNU Manuals (GNU-Assembler, 
GNU-Linker part of the binutils). You may also have to check the 
scatter-load file in the example from ARM and modify your linker-script 
to reflect the functionality. It seems the instructions for the 
procedure are expected at a special memory-location. It's difficult to 
help without a minimal but complete example.

In your case (OK6410 AND GNU toolchain AND coprocessor use) you are 
about to enter a unknown continent. You are amoung the first maybe this 
very first explorer of this new land.

Your tools are the description of the GNU tools and your processor 
manual and the way others took with KEIL toolchain.

> In my case I only want to config performance monitoring registers of
> ARM1176jzf-s processor with c and assembly programs that runs on linux
> OS.
> if I’m right KEIL is used for bare-metal devices

Then... In Linux access to some registers is possible only in privileged 
modes. "Bare-metal" access like in the KEIL examples is not possible. So 
you have to throw away "maps" from KEIL explorers and you have to find 
another way...

Under Linux there can be a special v6 PMU driver together with a 
Performance Events library (perfevents). Does your Linux on OK6410 has 
this library enabled? If yes then look i the source and examples for 
this library.

I'll stop here, because this is way to far away for me from initial 
question. I'm guessing only and can't give much input now.