Forum: FPGA, VHDL & Verilog VHDL "Pong" Game - Problem

von Gerard O. (ece101)

Attached files:

Rate this post
0 useful
not useful

I'm learning VHDL and as I've got some time off I decided to write a 
pong game!

I've run into a problem, In its current state, I am displaying the 
"paddle" on the screen, however, when I try to move the paddle (see line 
90) I get this error:

ERROR:Place:1018 - A clock IOB / clock component pair have been found 
that are not placed at an optimal clock IOB /
   clock site pair. The clock component <leftled_OBUF_BUFG> is placed at 
site <BUFGMUX_X2Y10>. The IO component
   <left_button> is placed at site <IPAD73>.  This will not allow the 
use of the fast path between the IO and the Clock
   buffer. If this sub optimal condition is acceptable for this design, 
you may use the CLOCK_DEDICATED_ROUTE constraint
   in the .ucf file to demote this message to a WARNING and allow your 
design to continue. However, the use of this
   override is highly discouraged as it may lead to very poor timing 
results. It is recommended that this error
   condition be corrected in the design. A list of all the COMP.PINs 
used in this clock placement rule is listed below.
   These examples can be used directly in the .ucf file to override this 
clock rule.
   < NET "left_button" CLOCK_DEDICATED_ROUTE = FALSE; >

I'm not sure how to interpret this error. I've attached the .vhd. With 
line 90: "paddle_loc <= paddle_loc + 1;" commented out, there are no 
apparent errors so far.

Also if someone could offer any tips on how I could improve the code to 
follow good programming practices I would appreciate it.

von Lothar M. (lkmiller) (Moderator)

Rate this post
0 useful
not useful
>   -- Clock divide by 1/2
This way is a absolutely No-Go on FPGAs.
As a beginner you have exctly 1 clock on the whole design. And all other 
("slower") actions are done by clock-enables. This one-and-only-clock

In your design design are much too much clocks. This is what the 
synthesis is telling you (its a little more difficult but thats the 

This here is called a combinational loop (aka combinatorial loop):
>     if left_button = '1'  then --and paddle_loc > 200 then
>        paddle_loc <= paddle_loc + 1;
What will paddle_loc do, when left button is '1'? Becsue theres no clock 
involved, it will count up at maximum speed (and thats something in the 
500MHz range)!

von Gerard O. (ece101)

Rate this post
0 useful
not useful
Ahh yes silly mistake!

As paddle_loc is declared as having a range from 0 to SCREEN_WIDTH - 
PADDLE_WIDTH (roughly 540), I had assumed that the paddle would move so 
fast I wouldn't be able to see it. I was just hoping to get the paddle 
to move any way at all before I added a clock divider for its speed.

I've spent the past few hours greatly improving the design and I've now 
got the paddle moving and ball bouncing around the screen!

I'll repost the code when I'm done to see if anyone see's anything which 
could be improved :)

Thanks for the help


Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]

Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.