EmbDev.net

Forum: Analog Circuits Low-pass-filter after PFC-Stage


Low-pass-filter after PFC-Stage
von kuebli (Guest)

Attached files:
Rate this post
• ▲ useful
▼ not useful 
Hi, Im modelling in LTspice since long time a PFC-stage including a 
Boost-Converter, which works in Boundary Conduction Mode. As control 
scheme I use Peak Current Control mode.

As Im interested on a reaction of the output voltage on load variations, 
I applied a load Jump from 800W to 1000W (at time stamp 33ms). The 
problem is, that the controller is not able to stabilize the output 
voltage after the load Jump. I always get low frequenz oscillations as 
attached. In my model I use ideal switchtes and ideal inductances and 
capacitances. The funtionality does work perfectly, but the settings or 
the controller gains are not made correctly by myself. And I dont know 
where to adjust, to get these ocillations away(or are they in a 
acceptable range.

thx in advance for any hint!

greez kuebli

ps.: red course is the output of the integrator (analog), blue course is 
the output-voltage, and the step represents the time stamp, where the 
load jump occurs

Report post Edit Move Thread sperren Anmeldepflicht aktivieren Anpinnen Delete topic Thread mit anderem zusammenführen Quote selected text Reply Reply with quote
Re: Low-pass-filter after PFC-Stage
von KlaRa (Guest)

Rate this post
• ▲ useful
▼ not useful 
Hallo kuebli,
ASC-File?
Gruss Klaus.

Report post Edit Delete Quote selected text Reply Reply with quote
Re: Low-pass-filter after PFC-Stage
von Fralla (Guest)

Rate this post
• ▲ useful
▼ not useful 
Do not use ideal components. A capacitor with no ESR will lead to a zero 
(which helps to boost the phase) at a very (or infinit) high frequency. 
Model the Capacitor with a realistic ESR of few 100mOhms.

The low frequenzy oscilation ist the result of to low phase margin of 
the voltage control loop. Which controller do you use? I think a simple 
integrator... The only way to increase phase margin is to decrease to 
integrator gain. But this will lead to larger overshoot of the DC-link 
voltage. The only way to get rid of this increased loop gain with high 
phase boost. A PI-Regulator could do this...

PS:  Need the .asc file for further help

MFG Fralla

Report post Edit Delete Quote selected text Reply Reply with quote
Watch this topic | Disable multi-page view
Please log in before posting. Registration is free and takes only a minute.
Existing account
Do you have a Google/GoogleMail account? No registration required!
Log in with Google account
No account? Register here.