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Forum: FPGA, VHDL & Verilog Problem Programming GAL22V10


von Zuga B. (Company: ZUGA CORP) (zuga_bullzeye)


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Hi! I'm trying to make a simple counter, from 0 to 99 using 8 bits. In 
the GAL i have 2 inputs, one for the CLK and the other for the CLR. And 
9 outputs, 4 for the units, 4 for the tens and 1 that just send '1' when 
the counter has reached the limit. I'm using Galaxy for the code. The 
code compiles well and i've also run a simulation and everything's fine. 
The outputs are sent to a bar of leds, and 7 leds are on all the time, 
nothing else happens. I'm using a G540 programmer.
Here is the code:

LIBRARY IEEE;

USE IEEE.STD_LOGIC_1164.ALL;

USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CONTADOR IS

  PORT(CLK,CLR: IN STD_LOGIC;

     QUNI, QDEC: INOUT STD_LOGIC_VECTOR(3 DOWNTO 0);
     C: OUT STD_LOGIC
     );



  ATTRIBUTE PIN_NUMBERS OF CONTADOR: ENTITY IS

  "CLK:1 CLR:2 C:23 "

&  "QDEC(3):22 QDEC(2):21 QDEC(1):20 QDEC(0):19 "

&  "QUNI(3):18 QUNI(2):17 QUNI(1):16 QUNI(0):15 ";

END CONTADOR;



ARCHITECTURE CUENTA OF CONTADOR IS

BEGIN

    PROCESS(CLK,CLR)

    BEGIN

        IF(CLR='1') THEN
         QUNI <= "0000";

       QDEC <= "0000";

       C <= '0';



      ELSIF(rising_edge(CLK)) THEN
          QUNI <= QUNI+1;

        C <= '0';


        IF(QUNI="1001") THEN
            QUNI <= "0000";
          QDEC <= QDEC+1;



          IF(QDEC="1010") THEN
             QUNI <= "0000";

           QDEC <= "0000";

           C <= '1';
          END IF;

        END IF;


    END IF;

    END PROCESS;

  END CUENTA;


HELP PLEASE!!!

von Lothar M. (Company: Titel) (lkmiller) (Moderator)


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> The code compiles well
QUNI, QDEC: INOUT STD_LOGIC_VECTOR(3 DOWNTO 0);
Why do you use inout ports?
You just don't want to use local signals?
You find it a nice trick to use inout ports,
so you don't have to write that much code?

As far as I see these ports are NOT bidirectional!
This may cause problems.
I recommend to use local signals for the counters and a assignment to 
the OUT ports for the LEDs.

> and i've also run a simulation
Thats ok...

> and everything's fine.
It it? So ... why do you have problems?
Additionally to the INOUT ports obviously the problem is generating the 
correct programming file. Which GAL do you use?

von guest (Guest)


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Zuga Bachocos wrotes:
The
code compiles well and i've also run a simulation and everything's fine.
The outputs are sent to a bar of leds, and 7 leds are on all the time,
nothing else happens.

So if the simulation succeeds you 've probably a bug in your hardware. 
Please check your layout and conections.

von Zuga B. (Company: ZUGA CORP) (zuga_bullzeye)


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Thanks!I've changed the INOUT. The problem, i think, its when 
programming counters, because i tried to program other counter and it 
doesn't work. I thought it was the programmer but i've programmed 
succesfully a couple of 7-segment decoders and also a scanner for a 
keypad.The first bit of the units should be on and off at the same 
frcuency of the CLK, but with a led it stays on all the time but really 
low, and the other bits of the units and the tens do he same. I'm using 
GAL22V10.

von Lothar M. (Company: Titel) (lkmiller) (Moderator)


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> but with a led it stays on all the time but really low,
You mean: the pin is low, so the led is on?

>  at the same frcuency of the CLK
Whats the frequency?
Where does the CLK come from?

> The problem, i think, its when programming counters
So you're able to generate some combinatorial logic, but not things with 
flipflops?
Try the simplest counter: a one bit toggling flipflop...
1
    PROCESS(CLK)
2
    BEGIN
3
      if rising_edge(CLK) then
4
         toggle <= not toggle;
5
      end if;
6
    END PROCESS;
7
    LED <= toggle;

von Uwe (Guest)


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He have to read the Valu back here QDEC=QDEC+1. Ever when its on the 
right side of the Equation ! It's a long time since i programmed GALs 
but I think you have to define the MODE the GAL should have, so it can 
make use of the Flip Flops and you dont have to build them on your own 
with inout.

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