I recently create a small software which can allow user to design hardware like playing with boxes. It has the following advantages comparing with other similar products. 1. Simple user interface, easy to learn and easy to use. Compare with other tools, our software can let you manage it in 15 minutes. 2. Based on most popular open source platform -QT, which is also known as cross platform SDK, so it can be used on Windows, Linux and Mac plus some embedded platforms. 3. Integrating with most famous Icarus Verilog compiler, it support both behaviour level and RTL level verilog simulation. 4. It has a waveform viewer to visualize the simulation result. 5. It can help developer to find connection errors before going to code level. Let developer focus on algorithms instead of coding. 6. It supports both Bottom-up and Top-down design methodology. 7. It supports command line action script, which means designer can use commands to design their system. 8. It allows designer to change or type in data like editing properties. 9. It supports personalize features by changing color properties. IF you are interested in playing with it, please go to http://robei.com to download the trial version and there is a video demo can lead you through. Please let me know your feed back so I can improve it.
Hello Spambot, when you really think that this "tool" is of any use then you never have done any HDL development. Despite it's possible to change the colour of certain elements. Regards Christian
Of course it is not of any use. It is a tool for entry level, let developers focus more on the algorithm instead of coding. When you work with design, normally, draw your idea then work on each part by coding. You need memorize your design all the time. But this tool helps you design with drawing, you can modify your algorithm any time. You can visualize your design and focus on your algorithm. The tool is small,fast and modern. Only works with simulation level. I created a 15 days trial version, why not play with it then send me your suggestions? Thanks!
Hi Micbot, there are several problems: -You don't even say for what the tool is really good for; complete designs? single mini modules like this 4 bit counter? -How does it help me to design algorithms when i can paint wires? -Your website does not even show an example for a real design. Btw. your 300 USD price tag is wrong, either you have to give it away for free so that anybody will even consider trying it out and so that you can have the hope to get bug reports. Or you have to ask for 10 to 50 times the amount when you want to sell it as typical EDA tool, but than it would have to integrate with cadence and/or synopsis tools. Good luck. Regards Christian
Christian, Thanks for your reply! I already put 15 days free trial on the website. This tool let you focus on your algorithm instead of dealing with the connections. Some demos shows how to use it only comes with software. After you install it, they will show up on your desktop. The code after simulation works with Xilinx ISE. You can assign pins for your design, and download to your board. But the tool only provide simulation step as it is tiny compare with ISE. Welcome to get suggestions from you!
This is 5% of waht we need. But it is already 150% of what we not need. Too much concentration of graphics - not the real requirements. A step in the wrog direction.
@micbot You did neither answer my question nor you seem have an idea how big usual HW designs are. E.g. i just looked how many wires some medium sized FPGA design has on the top level and there are 400 wire buses on the top level. (despite all measurements to reduce the wireing) With your graphical tool you could handle that and i bet at some point it would crash and destroy everything.
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Christian, That is a good question. The tool aims to reduce your wires by diving the design into levels. You can design a small hardware as a model, so the wires inside the model will not show on top levels. At the same time, I am using QT to handle all graphics, and QT can handle millions objects very fast, so 400 is not too much. If you crashed the tool, I give you a license for free if the bug is reproducible. Zeissig, Could you tell me what you want in the tool? This is a small base version, and we can do a lot by adding more features.
> Zeissig, Could you tell me what you want in the tool? This is a small > base version, and we can do a lot by adding more features. It have to grow up to an IDE. First systemC is only academic. This is not the first tool in history http://www.atl.external.lmco.com/projects/rassp2/vgui/gui_doc.html All such tools have problems. - analyse foreign code and import - abstraction in SysML(UML) diagrams are better as your box style - a language sensitve editor missed - VHDL and verilog - the effort up to date diagram and code is to much And your telefon number is not correct. It do not start with a area code.
René: Thanks for your reply! Good suggestions. The goal of Robei is going to be a new IDE. Compare with the VGUI, there are many differences. Robei do not want to mimic other tools, instead, we want build a tool that easy to use, simple to learn but powerful enough. We can support SystemC very soon. 1. analyse foreign code and import: Going to be one part of the tool. In fact, this is one task I want to realize before set it out for test. But I don't have enough time. 2.UML's concept is completely different with hardware design. That is why Robei exist. 3.We have verilog high lighter, but no auto-complete in editor. But you will see it soon. 4.Currently only support verilog because I don't know too much about VHDL. 5.Still need consider! I will change the phone number as it is in US. Let's use email to contact!
Just post a new version. This version will automatic save your current project in case close by mistakes.
For documentation I looking for a tool that generate a document. Hierarchy and timing diagrams in a good quality. http://www.texample.net/tikz/examples/timing-diagram/ > > I will change the phone number as it is in US. Let's use email to > contact! I would only know your country.
Great news: Robei provide free license for those customers who can provide valuable suggestion on this software. Just send your suggestions to robei"AT" robei.com.
Here is the video demo from youtube: Youtube-Video "Robei makes hardware design like playing with boxes!"
Robei is the world smallest EDA tool (less than 5Mbits) for Verilog based EDA software. It integrates modern graphical user interface and a tiny cross platform Verilog simulator. The biggest advantage of this software is that it is totally free for personal, education and research use. For commercial version, please contact us. Although Robei is very tiny, it has almost all the functionalities of a EDA software. Robei has modern GUI, Verilog compiler, property editor, code viewer and waveform viewer. The modern user interface of Robei provides visualization of FPGA design and simplified it by playing with reusable models and ports. The Toolbox is designed to contain huge of model libraries, and no matter where is your models. Property designer offers the most convenient method for viewing and changing values in code. All these parts are designed to be as simple as possible for designer. As long as you familiar with Verilog language, you can manage it in 15 minutes. With this tool, you can design your hardware visually in both RTL level and behavior level, and view the simulation result through waveform. It is a tiny, fast software for hardware prototyping and verification.
Robei seems like a rudimentary schematic editor which is has non benefits. Sorry, but that's the impression I have got. Maybe it is a good tool for educational purpose (pre university education) bacause of it's simplicity, but definitly not for productive development. Do you ever developed a project greater than a AND-gate or a simple counter? It seems not. Robei mixes up your advertised algorithmic Verilog-Coding with a schematic frontend for port definitions. If I have to learn Verilog to use this tool, than I can do the whole work in Verilog without Robei. Get familiar with Emacs + VHDL-Mode or the Verilog equivalent and simulate with GHDL, that's cheap and really effective in coding! Or use the toolchain delivered by your FPGA manufacturer. Quartus, ISE and so on has builtin schematic editors, huge libraries and includes simulation (and they are also free for use). Sorry, but there is completly no use for a new tool with an inefficient handling (click, click, click, click, code, ... click, click and so on). Because of the unflexibility of schematic editors I hate the mouse-"click" while working. Next construction area: The UI ... big buttons, big graphics, less information. This looks like a programming newbie, not like a professional software developer which will deliver professional software. Please, do not interpret this post as simple flaming. I've developed a bunch of FPGA and software projects and I would never use a such inefficient tool. It will complicate my work! If you want to create a "new way of HDL design", you must also create an innovative EDA which handles more than a Verilog model-pool ... Where are the advantages to use your tool? There are no ... My tip: Stop working on Robei as it is. Think about what sucks in EDAs like Quartus, ISE ... Restart Robei as a lightwight (also optical), easy to use and efficient development tool.
Currently there is not really more than Xilinx ISE or Model do offer, where Xilinx is right effective to import foreign designs. For me, the time of the "electronic board based" design entry is anyway over. This approach suits io based designs and handles symbol based design running bottom up. what we really need is support for top down development.
mac4ever, thanks for your honest suggestions. Robei is just a small tool for education and visual design. Currently it supports both bottom up and top down, while in before only bottom up. As an expert, you may like coding up with huge project and millions of pre-designed models. On mobile device, would you like to do the same coding with faster GUI operation existing? Robei is a tiny software for cross platform purpose, and will not want to compete with Xilinx ISE. We just want to let developer design small part of their project at anywhere, and use the design inside ISE to finish their task. Currently it can run on Android platform. Thanks!
gg I never heard anyone looking for hardware development tools on mobile devices ... a pencil and some sheets of paper will do the job,I think. Maybe you make a game from Robei, it seems your focus is on nice graphics and it's ported to mobile devices ... a good starting point for a good game. You won't be able to compete companies like Cadence, Mentor, Xilinx, Altera, ... They are big, have a lot of good people, a lot of money and a lot of experience. Best regards Matthias
> Currently it supports both bottom up and top down, I cannot see any top down support in the inner meaning > We just want to let developer design small > part of their project at anywhere, > Currently it can run on Android platform. VHDL design on the fly as a smartphone app while waiting for the bus, this is what we really needed
Thanks for your reply. The newest version still not released yet. You can design with Robei while you waiting for bus, seating on the train or on business travel. For VHDL, I will try it later as I am not familiar with it. But it is possible. Thanks!
Thanks. Real cross platform FPGA design tool. Right now has windows, linux, macos, android version. Please try it!
Is this still an active project? I followed the link but found nothing anymore. Project withdrawn?
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