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Hi to all Im having problem to get clock working... Im trying to get run the core on 41.78MHz to be able to make a delays of 70 nS. If Im right than it should work 1/ 41.78 = 23nS so even if one instruction would take two or three clock cycles. The system configuration is 32 Khz external crystal->PLL-> 41.78 MHz But when I try to set everything it still seems to run on factory default 5.22Mhz.. My code is
(in main) PLLKEY1 = 0xAA; PLLCON = 0x21;// User value set 32 kHz Input & PLL PLLKEY2 = 0x55; POWKEY1 = 0x01; POWCON = 0x00;//User value set Active mode & clock divider 0 POWKEY2 = 0xF4; while(1) GP4DAT ^= 0x00FF0000;// Just to see LED sysDelay_ms(1000);//My delay function where just simple while's are implemented |
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Hi thanks for your reply I just havent time to have look. Now I was trying the links but the are not working or just not for me?
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@Zdenek Krejci Retry with just the POWKEY, POWCON, POWKEY sequence without the PLLKEY, PLLCON. This should do when using the internal 32kHz R/C as source for the PLL. Anyway: the question can not be answered without showing more code, at least the implementation of sysdelay_ms(). @"jenny Lau" There is no need to place links to Chip-Broker websites here. They will not help to solve the OP's issue. The only useful technical information on the linked pages have been links to datasheets which can be downloaded from the ADI website directly.
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Ye I was trying that now without the PLLKEY but no luck... I was now trying to make sure different way, to initalize ADC to see how many samples I get when connect 100Khz on its input... If Im right, if the core runs corectlyu on 41Mhz than the ADC should be able to make 1MSPS so I should have about 10 samples on period... BUT Im getting only about 4 samples on these 100Khz... So either the clock is still not switching on 41Mhz or im doing something wrong with the ADC... Well anyway this info from datasheet is weird.. Table 15. ADCCON fADC/1. This divider is provided to obtain 1 MSPS ADC with an external clock <41.78 MHz. Does it mean that the ADC will not run on 1MSPS when the core have those 41MHz from PLL? It just must be external??
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Ye forgot here is the code
void adc_init(void){
/*ADC power control: power up as there is at least 5us before corect conversion*/
ADCCON |= (1<<5);
sysDelay_ms(1);
/*.....................ADCCON Resgister*/
/*Clock speed:fADC/1 1 MSPS with ext osc 41,78Mhz*/
ADCCON &= ~(1<<12);
ADCCON &= ~(1<<11);
ADCCON &= ~(1<<10);
/*Acquisition time*/
ADCCON &= ~(1<<9);
ADCCON &= ~(1<<8);
/*ADCBUSY:disabled*/
ADCCON &=~(1<<6);
/*Conversion mode: single ended*/
ADCCON &=~(1<<4);
ADCCON &=~(1<<3);
/*Conversion type: Continuous soft conversion*/
ADCCON |=(1<<2);
ADCCON &=~(1<<1);
ADCCON &=~(1<<0);
// Enable start conversion
ADCCON |= (1<<7);
/*============================================*/
/*.....................REFCON Resgister*/
/*Reference sellection:*/
/*For internal*/
REFCON |= 1<<0;/*Select internal*/
}
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