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#1804237
I tried to do simulation of MCB example design on sp601. I can run it on chip scope. I am running isim simulator. I have been trying for almost 3 days. I could see values for other signals but for data bus.. zzzzzzzzz.(except some times i see 000..fff) I dont know what i am doing wrong... Is the version of simulator matter? VHDL design with verilog memory model matters??? .