hi, I'm confused with way how long calls are generated when compiling some example code #pragma long_calls void *reserve_ram ( void **buf, unsigned int size ); void *release_ram ( void **buf ); #pragma long_calls_off extern unsigned int *ptr; unsigned int main (unsigned int msg) { reserve_ram ( &ptr, msg * 4 ); release_ram ( &ptr ); return 0; } with following options arm-elf-gcc -mthumb -save-temps -Os -Wall -c main.c compiler assembled it to .code 16 .file "main.c" .text .align 2 .global main .code 16 .thumb_func .type main, %function _main_: push {r4, lr} ldr r4, .L3 lsl r1, r0, #2 ldr r3, .L3+4 mov r0, r4 bl .L5 mov r0, r4 ldr r3, .L3+8 bl .L5 @ sp needed for prologue mov r0, #0 pop {r4, pc} .L4: .align 2 .L3: .word ptr .word reserve_ram .word release_ram .size main, .-_main_ .ident "GCC: (GNU) 4.3.3" .code 16 .align 1 .L5: bx r3 SO i have a question, is any way to generate calls directly by bx/blx instruction?. I mean something like this /* ... */ _main_: push {r4, lr} ldr r4, .L3 lsl r1, r0, #2 ldr r3, .L3+4 mov r0, r4 blx r3 mov r0, r4 ldr r3, .L3+8 blx r3 @ sp needed for prologue mov r0, #0 pop {r4, pc} /* ... */ regards, Bartek
You need an ARMv5 architecture for the BLX instruction. If your have, tell the compiler about it.
i have that architecture. Problem seems to be solved. thanks, Bartek
Please log in before posting. Registration is free and takes only a minute.
Existing account
Do you have a Google/GoogleMail account? No registration required!
Log in with Google account
Log in with Google account
No account? Register here.