Hello,

MCU: at91sam7s64
toolchain: Yagarto(gcc 4.2.2)

1) I'm studying the flash handling reference source code by Atmel and
found
that in most functions doing flash operations (erase, write, lock) this
code snippet exists:

//* set the Flash controller base address
AT91PS_MC ptMC = AT91C_BASE_MC;
...
//* Write the Set Lock Bit command
ptMC->MC_FCR = AT91C_MC_CORRECT_KEY | AT91C_MC_FCMD_LOCK |
(AT91C_MC_PAGEN & (Flash_Lock_Page << 8) ) ;

Why can't we simply do:
AT91C_BASE_MC->MC_FCR = AT91C_MC_CORRECT_KEY | AT91C_MC_FCMD_LOCK |
(AT91C_MC_PAGEN & (Flash_Lock_Page << 8) ) ;

Is there any special point in declaring that extra pointer and address
to the fields of structure in such a way, or it's simply a coding style?

2) am I right that read access to the flash is permitted when
Lock/Unlock
command is performed? So __ramfunc function attribute is not needed in
this case?

3) I don't quite understand how FMCN field of MC_FMR register is
calculated.
In Atmel examples:

AT91C_BASE_MC->MC_FMR = ((AT91C_MC_FMCN) & (72 << 16)) |
AT91C_MC_FWS_1FWS;

Well, I understand how they choose wait state, but what does 72 mean,
provided
that master clock is 47923200 Hz?

Moreover, for lock bits handling they program this field in another way:

AT91C_BASE_MC->MC_FMR = ((AT91C_MC_FMCN) & (48 << 16)) |
AT91C_MC_FWS_1FWS

Why is it so? Why can't we use the same amoount of cycles for both
operations?

Thanks.