I have implemented a simple library that places a reset code into RAM
and then resets the CPU by allowing the WDOG to timeout. The intent is
for the 'main()' code to read this reset code and determine the reason
the application code had to reset the device (CAN buss error, internal
computation error, etc.).
What I have found is that if I write to the RAM location only once
before resetting the WDOG, the RAM location is not updated and I get the
wrong reset code value. If I write the same value twice in a row, then
the RAM location is updated and everything works ok.
Can anyone tell me if the LPC2119 ARM implementation is using a data
cache of some sort and if so, is there an explicit way to flush it to
RAM (instruction, register setting, etc.)?
Daniel Quinz, P. Eng.