I'm trying to use this with a Microchip 25AA080 EEPROM

Here's my SPI Init function and defines:


//SPI defines
#define SPI_SLAV                    0x00000000      // bit0
#define SPI_MSTR                    0x00000001

#define SPI_FIX_SLCT                0x00000000      // bit1
#define SPI_VAR_SLCT                0x00000002

#define SPI_CS_DIRECT               0x00000000      // bit2
#define SPI_CS_DECODE               0x00000004

#define SPI_MODE_FAULT_EN           0x00000000      // bit4
#define SPI_MODE_FAULT_DS           0x00000010

#define SPI_LOCAL_LOOP_DS           0x00000000      // bit7
#define SPI_LOCAL_LOOP_EN           0x00000080

#define SPI_FIXED_CS_0              0x000e0000      // bit 19-16
#define SPI_FIXED_CS_1              0x000d0000      // bit 19-16
#define SPI_FIXED_CS_2              0x000b0000      // bit 19-16
#define SPI_FIXED_CS_3              0x00070000      // bit 19-16

#define SPI_DLY_BTWN_CS             0xff000000      // bit31-24

// SPI Chip Select Register
#define SPI_SCK_IDLE_LOW            0x00000000      // bit0
#define SPI_SCK_IDLE_HIGH           0x00000001

#define SPI_SCK_SAMPLE_FALLING      0x00000000      // bit 1
#define SPI_SCK_SAMPLE_RISING       0x00000002

#define SPI_CS_HIGH_AFTR_TRANS      0x00000000      // bit 3
#define SPI_CS_LOW_AFTR_TRANS       0x00000008

#define SPI_8_BITS_PER_TRANS        0x00000000      // bit7-4
#define SPI_16_BITS_PER_TRANS       0x00000080

#define SPI_SCK_DIV_FACTOR          256             // times the div
value by 256 as it is bit of 15-8

#define SPI_DLY_BF_SCK_HALF         0x00000000
#define SPI_DLY_BT_TRANS_0          0x00000000

#define SPI_SR_TX_EMPTY_MSK         0x00000002


void SPI_Init(void)
{
    AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1 << AT91C_ID_SPI ) ;
    AT91F_SPI_Reset     (AT91C_BASE_SPI);
    AT91F_SPI_Enable    (AT91C_BASE_SPI);
    AT91F_SPI_CfgMode   (AT91C_BASE_SPI,
           AT91C_SPI_MSTR |
                 SPI_FIX_SLCT |                       SPI_CS_DIRECT |
       SPI_MODE_FAULT_DS |
       SPI_LOCAL_LOOP_DS |
       SPI_FIXED_CS_0);

    AT91F_SPI_CfgCs     (AT91C_BASE_SPI, 0,
           SPI_SCK_IDLE_LOW |                      SPI_SCK_SAMPLE_RISING
|
       SPI_CS_HIGH_AFTR_TRANS |
       SPI_8_BITS_PER_TRANS |
      (4*SPI_SCK_DIV_FACTOR));

    AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, // PIO controller base address
    ((unsigned int) AT91C_PA13_MOSI    ) |
    ((unsigned int) AT91C_PA14_SPCK    ) |
    ((unsigned int) AT91C_PA11_NPCS0   ) |
    ((unsigned int) AT91C_PA12_MISO    ), // Peripheral A
        0 ); // Peripheral B
}

Thanks