problem about 711's clock

OP #1171890
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Hi,

It is OK like this:

  RCCU_Div2Config(ENABLE);
  RCCU_MCLKConfig(RCCU_DEFAULT);
  RCCU_FCLKConfig(RCCU_RCLK_8);
  RCCU_PCLKConfig(RCCU_RCLK_8);
  RCCU_PLL1Config(RCCU_PLL1_Mul_12 , RCCU_Div_4) ;
  while(RCCU_FlagStatus(RCCU_PLL1_LOCK) == RESET);
  RCCU_RCLKSourceConfig(RCCU_PLL1_Output) ;

when i change
  RCCU_PLL1Config(RCCU_PLL1_Mul_12 , RCCU_Div_4) ;
to
  RCCU_PLL1Config(RCCU_PLL1_Mul_12 , RCCU_Div_2) ;

code can't run.

so,MCLKval=24M is OK
MCLKval=48M is failure.

Is it a hardware problem?

MCLKval=RCCU_FrequencyValue (RCCU_MCLK);
APB1CLKval=RCCU_FrequencyValue (RCCU_FCLK);
APB2CLKval=RCCU_FrequencyValue (RCCU_PCLK);

thank you in advance.
#1171891
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What clock are you driving the str7 with ?

Here ia an example of using a 16MHz clock input

RCCU_Div2Config( ENABLE );
RCCU_MCLKConfig( RCCU_DEFAULT );
RCCU_FCLKConfig( RCCU_RCLK_2 );
RCCU_PCLKConfig( RCCU_RCLK_2 );
RCCU_PLL1Config( RCCU_PLL1_Mul_12, RCCU_Div_2 );
RCCU_RCLKSourceConfig( RCCU_PLL1_Output );

This will give us a MCLK of 48MHz and a peripheral clock of 24MHz

I have noticed that when debugging the clocks can sometimes get locked
up.
If you have get this behaviour then insert the follwing before the clock
config above. This will reset the clock to the default state before
changing to the new clcok source.
RCCU_RCLKSourceConfig( RCCU_CLOCK2 );

Hope this helps.
Spen
Guest #1171893
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Spencer Oliver wrote:
>
> I have noticed that when debugging the clocks can sometimes get locked
> up.
> If you have get this behaviour then insert the follwing before the clock
> config above. This will reset the clock to the default state before
> changing to the new clcok source.
> RCCU_RCLKSourceConfig( RCCU_CLOCK2 );
>

I try this today.
You are right.

add
  RCCU_RCLKSourceConfig( RCCU_CLOCK2 );
before the clock config,my board can run at 48M.


Thank you very much indeed.

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