small question to big answer

For a "Getting started":
http://www.arm.com/pdfs/comparison-arm7-arm9-v1.pdf

Martin Thomas

Grossly simplified answer, restricted to microcontroller/processor
scope.

Todays ARM7s often are single-chip microcontrollers, having ROM and RAM
basically internal, no cache, no MMU and run either barebone without any
operating system or use a simple integrated RTOS in a single system
image.

Most ARM9s are processors with internal cache+MMU and mostly external
RAM/ROM, and run downscaled versions of full-blown operating systems
like Linux, embedded Windows or the like.

Next years could show some shift towards fully integrated ARM9
microcontrollers though.

Custom chip integration cores are a different matter.

Hi.

Martin big thanks for your link, I read this document tomorow.
Please write more... . What is different on core or pipeline ... .

Please write more ... .

thanks.

Dzairo

Hi again.

Martin I read the document and I think so I don't understand something .
Interlocks have only ARM9???
the core is differ only on 5pipeline??

please write more..

regards

Dzairo

On ARM9, a load operation which takes several clock cycles is started
and execution continues with the next instruction in the next clock
cycle while the load is still in progress. Unless this operation depends
on the loaded data in which case there is a stall (interlocked
pipeline).

ARM7 however does not overlap loads and subsequent instructions,
therefore no pipeline interlock is required.

Thanks .

more question:
MMU and Cache memory .
what is MMU and cache and use it on MCU???
have some nice link???


regards

Dzairo

You may want to start with
http://en.wikipedia.org/wiki/Computer_architecture,
http://en.wikipedia.org/wiki/Memory_management_unit, etc.

Hi.

I read this link before.
but thanks a lot .


regards

Dzairo